Analysis and implementation of shunt active power filter based on synchronizing enhanced PLL

This paper addresses the analysis and software implementation of synchronizing circuit enhancement phase locked loop (EPLL) designing for use in controller of shunt active power filter (SAPF) for harmonics mitigation. Advantages of EPLL structure over conventional PLL's including its capability to made and maintain zero phase difference between input signal and voltage controlled oscillator (VCO) output signal. Proposed PLL architecture is extract individual harmonic component and track amplitude as well as phase angle of its input signal. The extracted currents are used for reference current generation in SAPF. The shunt active power filter is implemented using EPLL and investigated for three phase non-linear loads using MATLAB/Simulink platform. Simulation results show effectiveness and performance robustness synchronization using EPLL for improve power quality.