Image encryption/decryption design using NIOSII soft core processor

The increasing use of multimedia applications in the industrial and IT process requires us to protect confidential image data from unauthorized access. Cryptography is the most appropriate solution to protect our information against attacks. In this paper, Advanced Encryption Standard (AES), which is a symmetric algorithm, will be used for encryption and decryption of the image; the AES key size is 256 bits, as it is the most secure key length against the different existents attacks. In addition, lookup table will be used in the implementation of AES MixColumns transformation, which accelerates its execution time. The implementation of AES-256 bits algorithm will be done by NIOS II processor software embedded in the FPGA ALTERA DE2-115 development board. The design of our system is made by Qsys tool, which is available in QUARTUS II (Version 12.1 sp1) environment using NIOS II soft-core processor. An image is given as input to AES encryption algorithm. The output of encryption algorithm is given as input to decryption algorithm in order to get back the original image. The implementation is done on the developed single core platform using NIOS II processor. The result is analyzed in MATLAB by tracing the histogram of the original and encrypted image. As conclusion, our proposed AES-256 bits algorithm provides an interesting trade-off between speed and image security.