Low power signal processing via approximate multiplier for error-resilient applications

The exponentially enlarging usability and mushrooming features in the portable hand-held devices such as cellphone appeal for the highly energy-efficient designs as the user cannot tolerate power famished devices rather can manage with tiny degraded quality. The multimedia applications such as image/video processing are compute-intensive and require efficient designs which can be achieved by approximate designs with the feeble accord in accuracy. As multiplication is the most frequently used and highly energy-consuming arithmetic operation, in this paper, a low power approximate multiplier architecture (AMA) is proposed that significantly improves the design metrics. We evaluate the proposed AMA with various quality metrics and design an AMA embedded Gaussian smoothing filter (GSF). The simulation results show that AMA reduces 81.5% power consumption over accurate and 19.17% energy over the well-known approximate multiplier architecture. Further, the AMA embedded GSF reduces 6.2% area and 7.53% power consumption over the best known approximate multiplier embedded GSF.