Design and simulation of a CMOS compatible pH-ISFET readout circuit, with low thermal sensitivity

A readout circuit for a CMOS compatible pH-ISFET sensors is proposed in this paper, which carries out a temperature compensation and high linearity by using a compact analog circuit. The circuit was designed for a generic sensor structure, which was modeled in Verilog-A and HSPICE, using the AMI 1 μm CMOS process provided by MOSIS. The readout circuit operates under the same condition as the sensor. The proposed scheme reduces temperature sensibility and provide a linear circuit output response.