Performance improvements of on-chip solar cell for microsystem

Developing a microsystem that carries out a series of systems from acquisition of information to transmission to the outside on one chip. In this paper, we choose the solar cell as a power source of the system and the element functioning as the sensor part, and aim for improvement of function by using 0.18 μm standard CMOS process. Increasing the boundary area between the P-substrate and the N-Well which acts as a solar cell using a structure in which holes are opened in the N-Well as well as the bottom area of the N-Well. The area occupied by the solar cell was fixed at 100 μm × 100 μm, and the length of one side of the hole was varied between 1.40 and 5.44 μm. As a result, the maximum power generation efficiency was improved when the length of one side was 1.4 μm, and the value of the short circuit current increased by about 1% as compared with plain structure without hole. Also, no-dummy metal area(aperture) dependence was observed. When the no-dummy area increased the short circuit current has not proportional to the occupied area. However, regarding the open circuit voltage, superiority effect is observed.