Hardware acceleration of nonincremental algorithms for the induction of decision trees

In this paper, new algorithms for the full decision tree (DT) induction are presented, and various possibilities for their implementation are explored. First, description is given for the novel EFTI (Evolutionary Full Tree Induction) algorithm, designed in such a way that its implementations can utilize as little hardware resources as possible for the DT induction, as well as to induce as small decision trees as possible, without sacrificing the classification accuracy. Next, the possibility of the hardware acceleration of the EFTI algorithm is explored in form of the hardware co-processor EFTIP (Evolutionary Full Tree Induction co-Processor) using the hardware-software (HW/SW) co-design approach. Next, the algorithm for the induction of the DT ensembles, named EEFTI (Ensembles Evolutionary Full Tree Induction) is described, that is able to produce DT ensembles which have higher accuracies when compared to the single DTs. Again, the hardware-software (HW/SW) co-design implementation of the EEFTI algorithm is described and the results of the experiments comparing the execution speeds of the different EEFTI algorithm implementations are given.