A VLSI implementation of MPEG-2 AAC decoder system

This paper presents a real-time MPEG-2 AAC decoding system, which can decode 2-channel main profile MPEG-2 AAC bitstream. The system consists of a simple fixed-point programmable DSP core and two hardwired logic modules, which perform Huffman decoding and prediction respectively. To verify the designed decoding system, simulator model has been developed based on C-language. For the verification of decoding algorithm, the 16-bit PCM output of the system was compared with the result of the floating-point simulation, and the result showed the maximum of 2-bit difference. For the verification of real-time decoding, the number of the clock cycles in the worst simulation case was compared with that of the required clock cycles for the real-time decoding, and the result verified the real-time decoding of designed system.