Cherishing Old Knowledge, Acquiring New - Past, Present and Future of CMP Technology

Hitting the scene in the 1980s, CMP technology developed in line with the scaling and multi-layering of semiconductor devices, and is now deemed indispensable to the production of cutting-edge semiconductor devices. It once had a bad reputation for being a "dirty, difficult and experience dependent" process, which significantly improved later thanks to the introduction of the dry-in/dry-out concept. From that time, basically dealing with the polishing process in semiconductor production, CMP underwent various developments, including methods other than polishing. To meet planarization requirements, it has been necessary to develop three core elements simultaneously, that is, CMP equipment, consumable materials, and device integration. This paper intends to review CMP technology that has evolved along with the development of semiconductor devices, to organize various issues currently faced by CMP, and to provide a comprehensive overview of the past, present and future of planarization techniques, while referring to the commitment to assisting scaling efforts until 2020, as well as expectations of new semiconductor devices emerging after 2030. Keywords: CMP, Planarization, Polish profile control, Nanotopography, Uniformity, Future of CMP, semiconductor device,