Memristor based XNOR for high speed area efficient 1-bit full adder

Memristor technology has tendered the new dimensions in the semiconductor technology as a potential solution to offer high density, low power, non volatile digital logic and memory functions. In this paper nano-device property of Memristor has been utilized to design an area efficient high speed full adder. In comparison to other design of logic gate and full adder, the novel full adder circuit has the advantage of simplified architecture, better speed and higher power efficiency. The adder comprises of only 15 NMOS transistors and 15 Memristors. The design is simulated in SPICE and found that it produces better results when compared to equivalent 28T conventional CMOS full adder circuit in terms of area utilization, speed and power.