Phase rotated digital fractional divider for multichannel RF SoC's

With the progress of modern electronics, mixed IC are widely used. In such IC's, digital components occupy most of the area as in case of RF SoC's. The recent multimode multichannel RF SoC's, suffers from degradation in RF performance due to heavy resistance produced in the IC by the remaining circuitry. The two important types of these degradations are injection pulling and locking, causes due to parasitic coupling between various aggressors and victims, which shares same semiconductor die and are created because of the multiple oscillators and transmitter in IC. These degradations result in modulation distortion and/or production of unwanted spurs. By this paper, a new frequency planning technique is proposed for multicore RF system, which separates various aggressors and victims in LC tank oscillator and PA circuit, beyond the frequency pulling range of each other. This is achieved by avoiding the integral relation of frequency harmonics of different aggressors and victims in RF transmission channel with the help of a circuit based on phase rotation technique named digital fractional divider. These are the digital circuits with very low noise, and are capable of changing the time period of the input signal fractionally. This change in time period is obtained with the help of proper arrangement of various combinational and sequential circuits. The software used for various analyses throughout the project is Cadence having version IC6.1.5-64b with SCL 180 nm technology. The schematic tool is virtuso and simulation tool is spectra.