Single charge-pump generating high positive and negative voltages driving common load

A new architecture of charge-pump circuit is discussed that can be used to generate high positive and negative voltages to drive a common load (Load can be capacitive, resistive or both). Basic cell used for charge-pump consists of two phase clock signals, charge transfer NMOS transistors and bootstrapped configuration to boost the gate drive of NMOS transistors. Due to use of NMOS transistors, output resistance of circuit is lower than conventional circuits thus able to drive high load current. Electrical conditions of all devices used in the circuit is managed in such a way that there is no electrical stress across any transistor. Circuit is design and implemented in BCD-110nm technology using conventional (No DMOS) transistors.