New digit-serial three-operand multiplier over binary extension fields for high-performance applications

Digit-serial polynomial basis multipliers over GF(2^m) are broadly applied in elliptic curve cryptography, because squaring and polynomial reduction in GF(2^m) are simple operations. In this paper, we define a partial product formula to derive a new digit-serial three-operand multiplication algorithm. On the basis of the proposed algorithm, we have derived a new digit-serial structures for computing three-operand multiplication. Our proposed structures can reduce latency (clock cycles) by approximately 50% compared to the existing digit-serial two-operand multipliers used to perform three-operand multiplication. Therefore, the proposed structure can achieve high-throughput designs. According to the analysis reports, the advantages of the proposed designs are a short critical path, a low area-delay product, and a high throughput.