A low voltage high resolution pipelined incremental ADC

A low voltage incremental analog-to-digital converter with a pipelined architecture is presented. Using first order modulators the conversion time is significantly reduced even at low sampling rates while maintaining high resolution. The switched capacitor converter is designed to operate with a 1.8 V power supply and uses three pipelined modulators. With careful design and digital correction it is possible to achieve more than 15 bit resolution.