Design and architecture of the MPEG-4 video rendering co-processor 'TANGRAM'

The TANGRAM co-processor for rendering of MPEG-4 compliant video scenes has been developed in the European ACTS project AC105 Emphasis, which has been focused on architectures for MPEG-4 in hardware and software. Implementing the computational expensive rendering of arbitrary shaped video objects to the final video scene, this co-processor presents a solution for the most crucial backend algorithm of the new MPEG-4 standard. The TANGRAM co-processor supports the scene rendering for the CCIR 601 video format with an arbitrary number of video objects. The total size of all rendered objects for one scene may reach two times the size of the CCIR 601 format. Running at 100 MHz clock frequency, the co-processor achieves a peak performance of about 2 billion multiply-accumulate operations. The TANGRAM coprocessor has been designed for a 0, 35 /spl mu/m CMOS technology. About 60% of the overall area of 52 mm/sup 2/ is used for 190 Kbit on-chip static memory. The power consumption of the co-processor has been estimated with 1 W.