Characterisation of low energy boron implants and electrical results of submicron PMOS transistors

Low energy boron implants between 200 eV and 10 keV have been characterised for the effect of channelling and of pre-amorphisation on the as-implanted profiles. Suitable rapid thermal anneal conditions for a shallow drain formation compatible with a 0.18 /spl mu/m CMOS process were determined. One of these conditions was then used to fabricate PMOS transistors with shallow drain extensions using a 0.18 /spl mu/m flow chart. Transistor characteristics such as threshold voltage, junction leakage and asymmetry were then measured as a function of implanted species and energy, and of gate length.