Algorithms for Combined Inter- and Intra-Task Dynamic Voltage Scaling

Dynamic voltage scaling (DVS) is one of the most effective techniques for reducing energy consumption on battery-operated embedded systems. According to the granularity of units to which voltage scaling is applied, the DVS problem can be divided into two subproblems: (i) inter-task DVS problem and (ii) intra-task DVS problem. A lot of effective DVS techniques have addressed either one of the two subproblems, but none of them have attempted to solve both simultaneously. This paper examines the problem of combined inter- and intra-task DVS, called the combined DVS (CDVS) problem. We solve the CDVS problem in two embedded system domains: one is systems with a sleep state and the other without sleep state. For systems without sleep state, we propose a close-to-optimal algorithm for the CDVS problem. We show that the algorithm is optimal when the power is a quadratically increasing function of the system's clock speed or the applied voltage level. For systems with a sleep state, we propose a refinement algorithm that fine-tunes the solution to the CDVS problem without sleep state to further reduce energy consumption by exploiting sleep state. Experimental results show that our proposed CDVS algorithm without sleep state is able to reduce the energy consumption by 12.5% on average over the results by the method that sequentially performs two existing inter- and intra-task DVS techniques, which are both optimal under no sleep state. Furthermore, our CDVS algorithm with a sleep state can reduce the energy consumption by 7.1% on average over the results by the conventional representative method that utilizes sleep state, but does not consider intra- and inter-task DVS simultaneously.