Design considerations of signal-current enhancer OTA in CMOS 65-nm with large capacitive loads

A modified structure of operational transconductance amplifier (OTA) in CMOS 65-nm technology with signal-current enhancer and slew-rate (SR) helper is presented in this paper. The bias current is chosen to be lower than 0.1 μA to reduce the overdrive voltage requirement and thus make the amplifier survive under 0.7 V supply. An SR helper is also introduced to improve the transient performance. As proven by the simulation results, the resultant OTA when driving an output capacitor of 15 nF attained 83-dB dc gain, a gain-bandwidth product (GBW) of 2.08 MHz, and an SR of 0.3 V/μs, consuming only 7.5 μA of current in the steady state.