A low area ASIC implementation of 272 bit multiplier

Toom-Cook algorithm is a well-known method to compute large integer multiplication. In this paper, we propose an implementation of 272 bit multiplier based on Toom-Cook algorithm and finish the hardware implementation. Sythesizing with Synopsys Design Compiler in the SMIC 65nm CMOS process, the result shows that the design based on Toom-Cook can achieve at least 22.9% less on area and 43.4% less on power than the instance of Designware of synthesis tool.