Abstract:
In this paper, we propose a DFT method for RTL data paths to achieve 100% fault efficiency. The DFT method is based on hierarchical test and usage of a combinational ATPG...Show MoreMetadata
Abstract:
In this paper, we propose a DFT method for RTL data paths to achieve 100% fault efficiency. The DFT method is based on hierarchical test and usage of a combinational ATPG tool. The DFT method requires lower hardware overhead and shorter test generation time than the full scan method, and also improves test application time drastically compared with the full scan method.
Published in: VLSI Design 2000. Wireless and Digital Imaging in the Millennium. Proceedings of 13th International Conference on VLSI Design
Date of Conference: 03-07 January 2000
Date Added to IEEE Xplore: 06 August 2002
Print ISBN:0-7695-0487-6
Print ISSN: 1063-9667