Line reactor for parallel-interleaved high power inverters

In this paper the line reactor design for parallel connection of high power inverters with interleaved carriers is presented. Based on state of the art interleaving reactors configurations and based on high power requirements, design iterations are performed to detect the implementation issues. The parasitic effects are highlighted in finite element models and a new reluctance model is introduced. Experimental results are presented to support the findings from the simulations. Guidelines for future designs are highlighted with focus on parameter stability and efficiency.