Hardware-oriented turbo-product codes decoder architecture

Model of Turbo-Product Codes decoder architecture and method for construction of Turbo-Product Codes decoder are proposed in the paper. The model describes decoder functioning taking into account limitations of hardware platform and proposes re-use of components in the decoding process. The method provides set of steps for decoder implementation. Field-Programmable Gate Arrays circuits are selected as hardware platform. Implemented decoder demonstrates high throughput and can decode codes that consist of Hamming codes with different codeword length that can be configured “on-the-fly”.