DICE-based muller C-elements for soft error tolerant asynchronous ICs

Muller C-element is one of the main parts of an asynchronous circuit. Being sequential by its nature, it is vulnerable to single event upsets (SEU). We propose three 65 nm CMOS circuit implementations of SEU tolerant C-element, whose tolerance is achieved by using of well-known DICE principle and is proved by SPICE simulations and semi-empirical estimations.