Exploring the Influence of Variability on Single-Electron Transistors Into SET-Based Circuits

We analyze the performance of hybrid single-electron transistor (SET)-FET circuits when different variability sources are considered, e.g., SET's quantum dot location and FET device dimension variations. For the FET device, FinFET and vertical nanowire configurations have been studied. The hybrid SET-FET circuits with both SET and FET in vertical topology depict the best circuit performance and the highest integration level. The variability impact on different SET-based circuits has been analyzed, including negative differential resistance and logic inverters.