A Multiplying 1.5V 12-bit 60-MS/s Current Steering CMOS Digitalto- Analog Converter for low Latency Transceiver Front-Ends in Industrial Radio

This work presents a 12-bit 60 MHz multiplying Nyquist current-steering CMOS digital-to-analog converter (DAC) for the baseband section of wireless transmitter circuits in industrial radio applications. As a specific feature a configurable attenuator circuit is included, which allows gain adjustments down to 0.025 % FSR (linear) or down to 0.25 dB (logarithmic) steps. The implemented fully differential multiplying architecture utilizes dynamic LSB current scaling, which remarkably improves the signal-to-noise performance for attenuated baseband signals. The architecture is configurable for a wide set of applications. For the targeted Industry 4.0 radio system an oversampling ratio (OSR) of 3 is used in order to reduce the required order of the analog reconstruction filter. In addition, a 7-4-1 segmental structure minimizes area and optimizes the dynamic performance. The basic current cell has been optimized for low glitch operation. The full circuit operates with a single 1.5 V supply and the total power consumption is 60 mW. For attenuator settings from 0 to 12 dB the SINAD value stays close to 70 dB. The worst case glitch energy is less than 2.8 pVs. The active area of the baseband transmitter DAC with 3 12-bit cores (I, Q and 4096-step attenuator) is 0.3 mm(exp 2) in a 130 nm standard CMOS technology.