FPGA based low power hardware implementation for quality access control of digital image using dither modulation

In this paper, a dither modulation (DM) based watermarking technique along with its Field Programmable Gate Array (FPGA) based reconfigurable hardware implementation is proposed for quality access control of digital image in Discrete Cosine Transform (DCT) domain. Host image is block wise segmented and grouped in to various categories based on block variance. AC coefficients of similar category blocks are modulated by adaptive dither modulation (DM) without self noise suppression. Modulation causes deterioration in visual quality of the host image. This feature may be used in access control through reversible process. At the decoder side, authorised user suppresses the self-noise to provide superior quality of image. Moreover, FPGA based real-time hardware architecture is proposed. Experimental results show that the proposed hardware utilize minimum FPGA resource, very low power while operating in high frequency of 131.16 MHz.