Single photon counting through multi-channel TDC in programmable logic

We present a system for reading out signals from an array of 8 superconducting single photon detectors, which implements a high-performance architecture of multi-channel TDC in programmable logic with resolution guaranteed below 22 ps referred to each single channel. Each one of the 8 channels of the system consists of a detector, an analog conditioning stage, a comparator, and one channel of the TDC. Moreover, the TDC is equipped with an edge detector able to sense the position of the transition propagating along the delay line in the TDC layout within eight clock cycle, i.e. 20 ns. The host device is the programmable logic part of a Xilinx ZYNQ-7020 SoC device, even if also different FPGA devices could be used just with a simple migration at no cost. The system is interfaced by means of a USB 3.0 communication gate.