Timing models for PTP in Ethernet networks

The 1588 Precision Timing Protocol (1588-PTP) states that a timestamp event is generated at the time of transmission and reception of any event message and that the timestamp event occurs when the message's timestamp point crosses the boundary between the node and the network (event generation points). The protocol defines the message timestamp point for an event message as the beginning of the first symbol after the Start of Frame (SoF) delimiter. Up to Ethernet link throughputs of 10Gbps, due to the single lane nature of the Phy, this definition of timestamp point is quite easy to comprehend. While this definition is unambiguous even for higher throughputs, it adds considerable engineering challenge for the Ethernet link throughputs above 10Gbps, which can be typically a multi-lane in nature. Higher link throughputs such as 40Gbps & 100Gbps involve multi-lane distribution (MLD) via the virtual lanes in the PCS and the subsequent mapping of these virtual lanes into the physical lanes in the PMA, both introducing the possibility of timestamp event happening on any virtual lane and its subsequent mapping to any physical lane. Most of the 1588 designs in the market rely on timestamping inside a MAC. The delay from the timestamping point to the event generation point is estimated in order to calculate the net timestamp to be inserted in the relevant PTP event messages or to transfer the timestamp to the software stack. Thus, tracking the SoF delimiter from the timestamping point to the exit/entry point on the physical link, becomes utmost important in order to arrive at the timestamps of the highest accuracy required for various mission-critical timing applications. This article tries to bring out a comprehensive timing model detailing various delays to be considered for high-accuracy timestamps for Ethernet links. Such timing models may help organizations run upfront system simulations for the targeted accuracy requirement, saving implementation costs down the line.