Overlay-based side-channel countermeasures: A case study on correlated noise generation

Side-channel attacks against field-programmable gate arrays (FPGAs) enable attackers to reverse-engineer bitfile encryption keys, resulting in intellectual-property (IP) theft and tampering. To address this problem, we demonstrate that overlays - virtual architectures implemented atop an FPGA - provide a novel countermeasure strategy that can protect application IP even on vulnerable FPGAs. Although we demonstrate such protection via a case study on correlated noise generation, the approach is potentially applicable to any countermeasure and any overlay. By extending existing overlay benefits (e.g., fast compilation, application portability, 1000× smaller bitfiles) with improved hardware security, our approach provides an attractive platform for Internet of Things, defense, and many embedded applications.