Two-sample PLL with improved frequency response applied to single-phase current sensorless bridgeless PFCs

A new implementation of the recently proposed fixed-frequency two-sample (2S) quadrature generation subsystem (QSG) digital Phase Locked Loop PLL, applicable to single-phase Power Factor Correction (PFC), is proposed. Its characteristics are high accuracy and low computational burden. The proposed PLL includes a frequency feedback loop to improve the synchronization under line frequency variations. Its performance within a digital controller of a current sensorless bridgeless PFC is evaluated by simulations and experimentally. The obtained results are compared with previously published PLLs in the literature.