Active and Passive Techniques for Noise Sensitive Circuits in Integrated Voltage Regulator Based Microprocessor Power Delivery

The focus of this paper is power integrity design for noise sensitive circuits in the context of integrated voltage regulators (IVRs). Analysis and design require a combination of traditional noise mitigation and power conversion techniques simultaneously accounting for distributed load, parasitics, and decoupling, and IVR control mechanisms. Both passive and active techniques are described to target noise components based on the electrical proximity to their source and the intervening IVR controls. Simulation results are used to illustrate the concepts and effectiveness of design options.