Analysis of self-heating effect in a SOI LDMOS device under an ESD stress

The analysis of self-heating effect in a SOI LDMOS device under an ESD stress is presented in this paper. TCAD tools are used as the platform to explore the physical process of the bulk LDMOS device and the influence of buried oxide layer inserted in the substrate. Simulation results uncover that the buried oxide layer degrades the current-handling ability and changes the lattice temperature distribution of the LDMOS device, which makes the low ESD robustness of the SOI LDMOS device.