A common source LNTA of high linearity robust to temperature and process

A LNTA with robust improvement of IIP3 over temperature and process is proposed. Four auxiliary transistors are employed to achieve 3rd nonlinearity compensation using DS (derivative superposition) method. In order to maintain the high IIP3 over process and temperature (PT) variation, transistor's nonlinearity under PT is explored and corresponding bias circuit is built to keep enhancement in IIP3. The LNTA is designed under TSMC 0.18um process and achieves 23mS gain while drawing 3.1mA from 1.8V supply voltage at 1.2GHz. Simulation shows the auxiliary transistors offer over 10dB improvement of IIP3 regardless of process and temperature variation while consuming nearly no extra power and noise.