Novel time redundant flip-flop structure to attenuate the single-event transient

As the technology scales down, the single-event transient (SET) has become a great concern for the reliability of integrated circuits (ICs). A novel time redundant flip-flop structure is proposed to detect and correct the SET pulse. The most advantage of this structure is that it has very little setup and hold time overhead and the architecture need not be modified to recover the system. HSPICE simulation is adopted verify the validation of this structure. Finally, we give the use of this flip-flop in the pipeline based architecture.