Simulation on threshold voltage of L-shaped bottom select transistor in 3D NAND flash memory

A comprehensive simulation analysis method is proposed to improve the bottom select gate (BSG) transistor's Vth distribution by adopting under-channel implant in this work. L-shaped bottom select transistor is used in TCAT 3D NAND array. Bottom select gate (BSG) Vth may exhibit broad distribution, due to various lateral distances between cell string and common source, which is an intrinsic challenge for TCAT-type 3D NAND flash array. In this work, an under channel implant scheme is proposed for BSG Vth distribution optimization. Simulation result shows that, with optimized implant dose approach, BSG Vth shows less sensitivity to string-common source distance, which is beneficial for cell characteristics distribution control in high density 3D NAND array. All these simulation results contribute to provide a guideline for boosting efficiency optimization in high density three dimensional (3D) NAND flash memory operation.