Comparison of the effect of elastic and viscoelastic modeling of PCBs on the assessment of board level reliability

The assessment of board level solder joint reliability during thermal cycling is very important for electronic packages. During thermal cycling, the mismatch in Coefficient of Thermal Expansion (CTE) between the materials used in the package induces stress on the solder interconnects and results in deformation and stresses. Finite element tools are widely used for rapid design optimization and also for understanding board level reliability issues. Lumped board modeling approach, explicit geometry approach, and ECAD approach are the three widely used approaches for creating models for Printed Circuit Boards (PCBs). Mapping the metal fraction in each layer from ECAD data usually results in highly accurate and fast solutions. However, in situations where the ECAD data is not available the lump approach is employed as explicit geometry approach requires very large mesh size and very long solution times. In the lump approach, orthotropic elastic material properties are assigned to PCBs. However, for temperatures near and beyond the glass transition temperature, materials behave in a viscoelastic manner. In which case, considering viscoelastic properties would result in a more accurate representation than the orthotropic elastic lump model. In this paper, we present a comparative study on the orthotropic linear elastic and viscoelastic modeling of PCBs and how it affects the board level reliability of Wafer Chip Scale Package (WCSP) under thermal cycling. The viscoelastic material properties of PCBs are characterized using Dynamic Mechanical Analyzer (DMA). The frequency and temperature dependent complex moduli are obtained from the DMA. The obtained results are used to model the PCBs as viscoelastic materials on ANSYS 17.2. Thermal cycling is performed in ANSYS and the results obtained are compared to those obtained from the elastic modeling of PCBs.