Design of area CCD imaging system based on FPGA

This paper presents an satellite camera imaging system using area CCD based on FPGA. FPGA was adopted to act as a center unit to generate timing logic signals of the CCD and control the A/D converter, etc. The three-wire serial interface is used to communicate with the management and control system on the satellite. The image data of the CCD is coded by the imaging system and converted to the required format. The Binning and Line Dump function of the area CCD can be used to adjust the width of the spectral band. Test results show that the imaging system of area CCD can realize different imaging modes. It is a very important equipment in the development of the satellite cameras using area CCD.