Hybrid Control Technique-Based Three-Phase Cascaded Multilevel Inverter Topology

A three-phase cascaded multilevel inverter topology and a hybrid control technique are presented in this paper. The topology is derived from a proposed module of addition and subtraction of sources. An attempt is made to optimize the component count, viz., power switches count, gate drive count, capacitor count, diode count, and source count. The operating modes of basic module and the proposed three-phase topology are explained. The analysis is presented for both symmetrical and asymmetrical configurations. The fundamental frequency hybrid control technique, which is derived from nearest level control (NLC) and switching frequency optimal (SFO) algorithms, is presented. The power semiconductor switches in the topology are driven by gating signals generated with hybrid SFO-NLC technique. The necessary comparisons are done to show the enhanced features with the view of optimized component count and power quality. The simulations are carried out by MATLAB/SIMULINK software tool under both steady state and dynamic conditions. Experimental results are presented to validate the simulation results.