Design considerations for 2.5-D and 3-D integration accounting for thermal constraints

In this paper, we explore the design considerations of two approaches to 2.5-D integration (silicon interposer and bridge-chip) from a thermal perspective and compare to 3-D ICs. Moreover, the impact of die thickness mismatch and die spacing are investigated in 2.5-D systems. We conclude that the die dissipating the largest power should be the thickest in a multi-die package. Larger lateral spacing between dice reduces the temperature at the unrealistic expense of communication power efficiency. Therefore, it is necessary to consider this tradeoff when selecting appropriate die spacing.