Designing of Schmitt trigger based on current sink logic using 32NM CMOS and CNFET technology

In this paper the designing of Schmitt trigger based on current sink logic at 32nm CMOS and CNFET technology have been presented. The comparative analysis of both the technologies has been done. The attractiveness of this circuit lies in the fact that whole circuit is implemented with only 6 transistors in total. The designed circuit is simulated using HSPICE platform at a 32nm technology node. For CMOS the model parameters have been taken from PTM website and for CNFET Stanford model has been used for the simulation purpose. This circuit has been analysed for different inputs like sine waveform, pulse, damped sinusoidal input, triangular and exponential input. The average power, maximum power and propagation delay time has been calculated. The temperature sensitivity of the circuit has also been analysed in the range of -150° to +150°C. The hysteresis curves of the Schmitt trigger based on current sink logic with all the different inputs have been traced. This configuration attains higher gain in comparison with active loaded inverters.