Domocus: Lock free parallel legalization in standard cell placement

In the cell placement problem a circuit's cells must be placed within a specified chip area so that they are row aligned and contain no overlaps. The problem is usually tackled in phases, whereby in the first phase a global placer performs an initial spreading of cells with regards to some optimization criterion, most commonly wire length minimization. The output of the first phase might violate alignment and overlap constraints, therefore in a second phase, called legalization, the target is to restore constraint violations while incurring minimal changes compared to global placement. Since legalization may also be a subcomponent of iterative global placers, efficient algorithms both in terms of solution quality and running time are of paramount importance. In this paper we present a framework for lock-free parallelism of legalization scheme. The framework is evaluated using Abacus, an algorithm that is well documented to achieve good solution quality but incurring high running time. We term the resulting legalization algorithm Domocus. Through experiments with commonly used benchmark circuits, we conclude on the scalability and efficiency of Domocus.