Hardware-in-the-loop co-design testbed for flying capacitor multilevel converters

The multilevel flying capacitor topology is a promising technology for future electric aircraft, where high specific power density power converters are required. Hardware-in-the loop co-design can improve design throughput as more complex implementations of this technology are developed. This paper presents a comparison of hardware-in-the-loop emulation and hardware prototype results for 3-, 5- and 7-level flying capacitor converters. The fidelity of the emulation is investigated for both dc-dc and inverter operation and it is shown that, within certain limits, the converter operation can be emulated closely.

I. Introduction

As public and private agencies look towards electric aircraft as the future of air travel, several technical challenges in vehicle power systems have been identified. One such challenge is the development of a robust, high-efficiency and high-energy density converter to drive the electric machines used for propulsion [1], [2]. The flying capacitor multilevel (FCML) inverter is a promising topology that can meet these performance requirements [3]–[5], with recent advances in control through closed-loop, phase-shifted pulse width modulation (PSPWM) demonstrated in [6], [7].