Hardware-in-the-loop co-design testbed for flying capacitor multilevel converters | IEEE Conference Publication | IEEE Xplore

Hardware-in-the-loop co-design testbed for flying capacitor multilevel converters


Abstract:

The multilevel flying capacitor topology is a promising technology for future electric aircraft, where high specific power density power converters are required. Hardware...Show More

Abstract:

The multilevel flying capacitor topology is a promising technology for future electric aircraft, where high specific power density power converters are required. Hardware-in-the loop co-design can improve design throughput as more complex implementations of this technology are developed. This paper presents a comparison of hardware-in-the-loop emulation and hardware prototype results for 3-, 5- and 7-level flying capacitor converters. The fidelity of the emulation is investigated for both dc-dc and inverter operation and it is shown that, within certain limits, the converter operation can be emulated closely.
Date of Conference: 23-24 February 2017
Date Added to IEEE Xplore: 01 June 2017
ISBN Information:
Conference Location: Champaign, IL, USA

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