Fast timing characterization of cells in standard cell library design based on curve fitting

This paper presents a fast method for timing characterization of standard cell library. It is based on curve fitting to solve the CPU resources and storage issues for the generation of a large scale liberty files. In our approach, generation of a characterized file of a full library takes less than 1 hour instead of 650 hours of simulation time. The paper also presents the method used to qualify and check accuracy of the generated data on a real circuit design. Implementation results demonstrate that the error of the interpolated timing and power liberty file against the characterized one is less than 3%.