An automated Reconfigurable-Computing Environment for accelerating software applications

In this paper, we present the Reconfigurable-Computing Environment (RCE) toolset for automatically generating VHDL models for implementation of generic applications on a Field Programmable Gate Array (FPGA). The RCE toolset automatically generates the hardware description of an Application Specific Digital Signal Processor (ASDSP) that is loaded onto an FPGA board containing multiple memories connected to an FPGA. We also present, PolyGen, an automated tool that generates scalable floating point polynomial evaluation units. Polynomial evaluation is used as an application to demonstrate the merits of the RCE framework. Our experiments show that the results obtained executing polynomial evaluation using the RCE framework is significantly faster than executing it on a typical server. While the maximum clock rate of the FPGA board (200 MHz) is an order of magnitude slower than a server (3.4 GHz), we achieve approximately 200× speedup. If all the resources on the FPGA board are used it is possible to achieve a potential speedup of 800× using the RCE framework.