Performance-driven technology mapping for XC5510 family FPGAs

Our work is devoted to researching and implementing technology mapping algorithm into software program, used in custom synthesis flow. Universal synthesis algorithms for FPGA often can't provide an acceptable level of performance due to the fact that they don't take into account all the features of the specific architecture. In this regard, the task of developing architecturally oriented synthesis algorithms is highly relevant. In this paper, designed algorithm for XC5510 FPGA family is described. The algorithm is implemented as a software module and is integrated into the synthesis flow. Our solution has been tested on a set of various circuits (ISCAS, etc) and showed significant performance increasing for final user devices.