A 15–21 GHz I/Q Upconverter With an On-Chip Linearization Circuit for 10 Gbps mm-Wave Links

This letter presents a 15-21 GHz I/Q upconverter, based on two Gilbert-cell mixers with an on-chip wideband linearization loop that extends the linear region and allows power efficient operation at backoff power levels. A quadrature LO signal is generated using an integrated two-stage polyphase filter. Measurements show a conversion gain of -5.5 dB, an output 1-dB compression point of 0 dBm, and an image suppression of 40 dB over the 6-GHz output bandwidth. An error vector magnitude of 3.5% is obtained for a 10-Gb/s 64-QAM signal with a bandwidth of 2 GHz. The circuit is integrated in a 55-nm BiCMOS process and occupies 1.07 mm2. The dc power consumption is 61 mW.