Tutorial T9: Devices and Circuits to Address the Challenges in IOT

Summary form only given, as follows. The complete presentation was not made available for publication as part of the conference proceedings. Internet of things (IOT) is becoming a reality because of the phenomenal reduction in the cost of chips and the required infrastructure, like 60X reduction in computation cost, 40X reduction in bandwidth cost and nearly 2X reduction in the price of sensors in the last decade. It is expected that nearly 20 billion devices would be connected to internet by the year 2020. These cost reduction trend should continue to meet the expectation. This is only possible if the transistors continue to scale, without hitting the power wall. This can be only achieved with newer devices and low power circuit design techniques for IOT. This tutorial focuses on the circuit design techniques and devices required to address the challenges posed by IOT. It describes the challenges incurred in traditional CMOS scaling and how it is hitting a power wall. Several device innovations like strained silicon, High K Metal gate and new device structures like FINFETs would be discussed, focusing on the role played to overcome the road blocks of traditional scaling. Future device structures would be also discussed and a review of these devices would be presented. Key circuit design techniques like near threshold and Sub threshold voltage operation would be discussed in context to the ultra-low power requirement of IOT.