Numerical Simulation of N+ Source Pocket PIN-GAA-Tunnel FET: Impact of Interface Trap Charges and Temperature

This paper investigates the reliability of PINgate-all-around (GAA)-tunnel field-effect transistor (TFET) with N± source pocket. The reliability of the PNIN-GAA-TFET is examined by analyzing: 1) the impact of interface trap charge (ITC) density and polarity and 2) the temperature affect ability on analog/RF performance of the device. It is realized that the interface traps existing at the Si/SiO
₂
interface modifies the flatband voltage and, thereby, alters the analog and RF characteristics of the device. The analysis is done at various trap charge densities and polarities. The results, thus, obtained reveal that, at higher trap charge density, the device performance alters significantly. It is obtained that, for a donor trap charge density of 3 × 10
¹²
cm
^-2
, the off-state current of the device degrades tremendously (increases from an order of 10-17-10
^-9
A). The temperature affectability over the device reveals that, at lower gate bias, the Shockley-Read-Hall phenomenon dominates and degrades the subthreshold current of the device at elevated temperatures. However, for the super threshold regime, the band-to-band tunneling (BTBT) mechanism dominates. Furthermore, the results show enormous degradation in the off-state current at elevated temperatures, such that, with an increase in the ambient temperature from 200 K to 400 K, the IOFF degrades by an order of 105, i.e., increases from 10
^-18
A to 10
^-13
A. The results specify that the PNIN-GAA-TFET is insusceptible to the acceptor traps existing at the Si/SiO
₂
interface in comparison with the donor traps.