Synthesizable Quaternary logic blocks

Quaternary logic offers representation of digits very minimalistically. Hardware required to store, process such data is still a test. Combinational and sequential block are composed in this work. Work includes making libraries for Quaternary framework, Making packages for elements of Quaternary framework and lastly creating configuration for function. Coding for Quaternary blocks is done and actualized on FPGA in this work. Examination of quaternary and binary system demonstrates promising methodology towards lowering interconnect.