Null convention logic (NCL) based asynchronous design — fundamentals and recent advances

As clock skew and power consumption become major challenges in deep submicron design of synchronous circuits, asynchronous designs, especially Null Convention Logic (NCL) subset, is gaining more and more attention. The NCL methodology eliminates problems related to the clock tree and also, can significantly reduce power consumption, noise and electromagnetic interference (EMI). In this paper, we present a comprehensive introduction to the NCL design approach, from fundamentals to recent advances. In addition, automated design flows for NCL circuits are also discussed.