Sub-period interleaved Fibonacci switched capacitor converter

This paper proposes, the topology of dual output interleaved Fibonacci switched capacitor converter by using a basic synthesis of Fibonacci converter. The proposed converter have more efficiency less voltage ripple. In the single output SCC, resolution of target voltage are spaced as 1/X, but in proposed method target voltage are spaced as 1+X, which gives a number of conversion ratios. The proposed converter are used for low power application such as VLSI system and energy harvesting devices. Theoretical results and simulation results are verified using PSIM.